Fabrication of High‐Density Micro‐Bump Arrays for 3D Integration of MEMS and CMOS

Author:

Shi Yunfan1,Wang Zilin1,Huang Rutian1,Kang Jin2,Zheng Kai2,Bu Weihai2,Wang Zheyao13

Affiliation:

1. Tsinghua University Beijing 100084 China

2. Semiconductor Technology Innovation Center (Beijing) Corporation Beijing 100176 China

3. Beijing Innovation Center for Future Chips Beijing 100084 China

Abstract

Cu‐Sn transient‐liquid‐phase bonding has a limit in achieving small diameter/high‐density bumps due to the extrusion of the melted Sn layer during bonding. This paper report a new method that can fabricate small diameter Cu‐Sn bumps with 5 μm diameter and 25 μm pitch based on a new thermal reflow and pre‐bonding method that enables solid‐state Cu‐Sn reaction for avoiding Sn extrusion. Using the new method, 3D integration of a 640 × 480 MEMS array on a CMOS circuit chip has been demonstrated. This method can be used in 3D integration of MEMS arrays and CMOS circuits such as micromirror arrays. © 2024 Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

Funder

National Natural Science Foundation of China

Beijing Natural Science Foundation

Publisher

Wiley

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