Author:
Cortadella Jordi,Galceran-Oms Marc,Kishinevsky Mike,Sapatnekar Sachin S.
Funder
Spanish Ministry for Economy and Competitiveness and the European Union
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
9 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. An Automated Synthesis Framework for Fast Evaluation of Maximum Operating Frequency;2023 International Conference on Electronics, Information, and Communication (ICEIC);2023-02-05
2. Hardware Reusability Optimization for High-Level Synthesis of Component-Based Processors;2022 11th International Conference on Communications, Circuits and Systems (ICCCAS);2022-05-13
3. Synthesizing General-Purpose Code Into Dynamically Scheduled Circuits;IEEE Circuits and Systems Magazine;2021
4. From C/C++ Code to High-Performance Dataflow Circuits;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021
5. A Study of Logic Synthesis Strategy Based on LVT Devices for Increasing Clock Frequency of SoC Processor Core;2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM);2020-10-23