Author:
Josipovic Lana,Guerrieri Andrea,Ienne Paolo
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
12 articles.
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1. Suppressing Spurious Dynamism of Dataflow Circuits via Latency and Occupancy Balancing;Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2024-04
2. Survival of the Fastest: Enabling More Out-of-Order Execution in Dataflow Circuits;Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2024-04
3. High-Level Synthesis;FPGA EDA;2024
4. A High-Frequency Load-Store Queue with Speculative Allocations for High-Level Synthesis;2023 International Conference on Field Programmable Technology (ICFPT);2023-12-12
5. Optimizing Data Availability and Utilization in Deep Learning Accelerator SoCs;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04