Author:
Sim Mong Tee,Zhuang Yanyan
Cited by
13 articles.
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1. On-Chip Bus Protection against Soft Errors;Electronics;2023-11-19
2. A radiation hard RISC-V microprocessor for high-energy physics applications;Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment;2023-11
3. Towards Dependable RISC-V Cores for Edge Computing Devices;2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS);2023-07-03
4. Hardened Processor Architecture;2023 30th International Conference on Mixed Design of Integrated Circuits and System (MIXDES);2023-06-29
5. Enhancing Fault Awareness and Reliability of a Fault-Tolerant RISC-V System-on-Chip;Electronics;2023-06-06