An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs-Reference-Cited by-同舟云学术

An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs

Published:2023-04-01 Issue:2 Volume:11 Page:331-342
ISSN:2168-6750
Container-title:IEEE Transactions on Emerging Topics in Computing
language:
Short-container-title:IEEE Trans. Emerg. Topics Comput.

Author:

Wu Bi¹^ORCID,Zhu Haonan¹^ORCID,Reis Dayane²^ORCID,Wang Zhaohao³^ORCID,Wang Ying⁴^ORCID,Chen Ke¹^ORCID,Liu Weiqiang¹^ORCID,Lombardi Fabrizio⁵^ORCID,Hu Xiaobo Sharon⁶^ORCID

Affiliation:

1. College of Electronics and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, China

2. Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA

3. School of Integrated Circuit Science and Engineering, Beijing Advanced Innovation Center for Big Data and Brain Computing, Fert Beijing Research Institute, Beihang University, Beijing, China

4. Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China

5. Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA

6. Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA

Funder

Natural Science Foundation of Jiangsu Province

National Natural Science Foundation of China

Fundamental Research Funds for the Central Universities

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computer Science Applications,Human-Computer Interaction,Information Systems,Computer Science (miscellaneous)

Link

http://xplorestaging.ieee.org/ielx7/6245516/10144811/10027860.pdf?arnumber=10027860

Reference40 articles.

1. PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks

2. ReMiT: Redundancy Migration for Latency Aware Fault Tolerant Cache Design in Multicore

3. PIMBALL

4. Compile-Time Silent-Store Elimination for Energy Efficiency

5. In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping

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