Investigation of the Performance Limits of III-V Double-Gate n-MOSFETs
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4286335/4286336/04286351.pdf?arnumber=4286351
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Performance Analysis of Compound III-V Semiconductor Materials based MOSFET;2022 IEEE 9th Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON);2022-12-02
2. Parameter Variations of a Short Channel Gaas Junctionless-Gate-All-Around Field-Effect Transistor Including Quantum Mechanical Effects;SSRN Electronic Journal;2022
3. Enhancement of Ge-based p-channel vertical FET performance by channel engineering using planar doping and a Ge/Si x Ge1–x–y Sn y heterostructure model for low power FET applications;Semiconductor Science and Technology;2018-10-04
4. Silicon–Germanium Channel Heterostructure p-MOSFETs;Proceedings of the International Conference on Microelectronics, Computing & Communication Systems;2017-12-30
5. Compact modeling of the shift between classical and quantum threshold voltages in a III–V nanowire;Solid-State Electronics;2014-10
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