Comparison of modeling approaches for transistor degradation: model card adaptations vs subcircuits
Author:
Affiliation:
1. Fraunhofer Institute for Integrated Circuits IIS,Division Engineering of Adaptive Systems EAS,Dresden,Germany
2. X-FAB France SAS,Corbeil-Essonnes Cedex,France
3. X-FAB Dresden GmbH & Co. KG,Dresden,Germany
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8894830/8901681/08901760.pdf?arnumber=8901760
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