Short-Circuit Rugged 1.2 kV SiC MOSFET with a Non-Linear Dielectric Gate Stack
Author:
Affiliation:
1. University of Naples Federico II,Department of Electrical Engineering and Information Technologies,Naples,Italy
2. Ca’ Foscari University of Venice,Department of Molecular Sciences and Nanosystems,Mestre Venice,Italy
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10147163/10147396/10147604.pdf?arnumber=10147604
Reference14 articles.
1. Gate-damage accumulation and off-line recovery in SiC power MOSFETs with soft short-circuit failure mode
2. Effect of gate-source bias voltage and gate-drain leakage current on the short-circuit performance of FTO-type SiC power MOSFETs
3. SiC MOSFETs soft and hard failure modes: functional analysis and structural characterization
4. Circuit-Based Electrothermal Simulation of Multicellular SiC Power MOSFETs Using FANTASTIC
5. Ferroelectric transistors with improved characteristics at high temperature
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3. Substantial Improvement of the Short-circuit Capability of a 1.2 kV SiC MOSFET by a HfO2/SiO2 Ferroelectric Gate Stack;2024 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2024-06-02
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