Effect of gate-source bias voltage and gate-drain leakage current on the short-circuit performance of FTO-type SiC power MOSFETs

Author:

Richardeau F.,Borghese A.,Castellazzi A.,Irace A.,Chazal V.,Guibaud G.

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Non-Linear Gate Stack Effect on the Short Circuit Performance of a 1.2-kV SiC MOSFET;Solid State Phenomena;2024-08-23

2. Substantial Improvement of the Short-circuit Capability of a 1.2 kV SiC MOSFET by a HfO2/SiO2 Ferroelectric Gate Stack;2024 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2024-06-02

3. A Half-Bridge-Level Gate-Oxide Failure Online Detection Method Without Invading Converters for SiC MOSFETs;IEEE Journal of Emerging and Selected Topics in Power Electronics;2023-06

4. Short-Circuit Rugged 1.2 kV SiC MOSFET with a Non-Linear Dielectric Gate Stack;2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2023-05-28

5. Gate Current Peaks Due to CGD Overcharge in SiC MOSFETs Under Short-Circuit Test;2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2023-05-28

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