Oolong: A Baseband processor extension to the RISC-V ISA-Reference-Cited by-同舟云学术

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Oolong: A Baseband processor extension to the RISC-V ISA

Published:2016-07 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
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Author:

Melo Cecil Accetti R. A.,Barros Edna

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7750935/7760761/07760808.pdf?arnumber=7760808

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. RV-GEMM: Neural Network Inference Acceleration with Near-Memory GEMM Instructions on RISC-V;Proceedings of the 21st ACM International Conference on Computing Frontiers;2024-05-07

2. Optimizing CNN Computation Using RISC-V Custom Instruction Sets for Edge Platforms;IEEE Transactions on Computers;2024-05

3. A Portable DSP Coprocessor Design Using RISC-V Packed-SIMD Instructions;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

4. Customized Instruction on RISC-V for Winograd-Based Convolution Acceleration;2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP);2021-07

5. A RISC-V ISA Extension for Ultra-Low Power IoT Wireless Signal Processing;IEEE Transactions on Computers;2021

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