A RISC-V ISA Extension for Ultra-Low Power IoT Wireless Signal Processing-Reference-Cited by-同舟云学术

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A RISC-V ISA Extension for Ultra-Low Power IoT Wireless Signal Processing

Published:2021 Issue: Volume: Page:1-1
ISSN:0018-9340
Container-title:IEEE Transactions on Computers
language:
Short-container-title:IEEE Trans. Comput.

Author:

Belhadj Amor Hela,Bernier Carolynn,Prikryl Zdenek

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Link

http://xplorestaging.ieee.org/ielx7/12/4358213/09366907.pdf?arnumber=9366907

Cited by 19 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Runtime Manager Integrated Emulation Environment for Heterogeneous SoC Design with RISC-V Cores;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27

2. Tracking accelerator based on RISC-V custom instructions for GNSS receiver;IEICE Electronics Express;2024-05-25

3. Longnail: High-Level Synthesis of Portable Custom Instruction Set Extensions for RISC-V Processors from Descriptions in the Open-Source CoreDSL Language;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3;2024-04-27

4. Tracking Accelerator Based on RISC-V Custom Instructions for GNSS Receiver;IEICE ELECTRON EXPR;2024

5. RISC-V Custom Instructions of Elementary Functions for IoT Endpoint Devices;IEEE Transactions on Computers;2024-02

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