Customized Instruction on RISC-V for Winograd-Based Convolution Acceleration-Reference-Cited by-同舟云学术

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Customized Instruction on RISC-V for Winograd-Based Convolution Acceleration

Published:2021-07 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP)
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Author:

Wang Shihang,Zhu Jianghan,Wang Qi,He Can,Ye Terry Tao

Funder

Research and Development

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9516456/9516465/09516614.pdf?arnumber=9516614

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Convex: A RISC-V Instruction Set Extension Scheme for Accelerating Convolution Operations on MCUs;Proceedings of the 2024 8th International Conference on High Performance Compilation, Computing and Communications;2024-06-07

2. Efficient Verification Framework for RISC-V Instruction Extensions with FPGA Acceleration;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

3. Optimizing CNN Computation Using RISC-V Custom Instruction Sets for Edge Platforms;IEEE Transactions on Computers;2024-05

4. RISC-V R-Extension: Advancing Efficiency with Rented-Pipeline for Edge DNN Processing;2024 International Conference on Artificial Intelligence in Information and Communication (ICAIIC);2024-02-19

5. An Optimized Implementation of Activation Instruction Based on RISC-V;Electronics;2023-04-24

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