FIR Filter design using Urdhva Triyagbhyam based on Truncated Wallace and Dadda Multiplier as Basic Multiplication Unit
Author:
Affiliation:
1. School of Engineering, Mohan Babu University,Department of ECE,Tirupati
2. Sri Venkateswara College of Engineering,Department of ECE,Tirupati
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10134573/10134574/10134709.pdf?arnumber=10134709
Reference11 articles.
1. High Performance Variable Precision Multiplier and Accumulator Unit for Digital Filter Applications
2. Design of Optimal Multiplierless FIR Filters With Minimal Number of Adders
3. Design of energy efficient and low power asynchronous 8*8 multiplier;Maheswari;Advances in Natural and Applied Sciences,2017
4. Booth Multiplier-Based Robust Model of FIR Filters for VLSI Applications
5. Performance evaluation of Distributed Arithmetic based MAC Structures for DSP Applications
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