High Speed Single Precision 64-Tap FIR Filter Using Urdhva Tiryagbhyam Sutra-Reference-Cited by-同舟云学术

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High Speed Single Precision 64-Tap FIR Filter Using Urdhva Tiryagbhyam Sutra

Published:2024-06-21 Issue: Volume:11 Page:1-5
ISSN:
Container-title:2024 IEEE Students Conference on Engineering and Systems (SCES)
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Author:

Satyam ¹,K Neelima²,Sandhiya M.³,Padma C.⁴,Ali Shaik Jaffar²,Meruva Kumar Raja⁵

Affiliation:

1. Birla Institute of Technology and Science,Dept. of EEE,Pilani,Rajasthan,India

2. Mohan Babu University erstwhile Sree Vidyanikethan Engineering College,Dept. of ECE,Tirupati,India

3. Panimalar Engineering College,Department of ECE,Chennai,India

4. Sri Venkateswara College of Engineering,Dept. of ECE,Tirupati,India

5. Capgemini,Hyderabad,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10651579/10652261/10652418.pdf?arnumber=10652418

Reference16 articles.

1. FIR Filter design using Urdhva Triyagbhyam based on Truncated Wallace and Dadda Multiplier as Basic Multiplication Unit

2. Design and Implementation of Arithmetic based FIR Filters for DSP Application;Bhavya

3. Design and Verification process of Combinational Adder using UVM Methodology

4. High-Speed DSP Pipelining and Retiming techniques for Distributed-Arithmetic RNS-based FIR Filter Design

5. Booth Multiplier-Based Robust Model of FIR Filters for VLSI Applications

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