Fundamental Study of the Temperature Ramp-Up Influence for 3C-SiC Hetero-Epitaxy on Silicon (100)

Abstract

Usually a waiting step at around 1000°C to 1100°C during the carbonization step for 3C-SiC on silicon is implemented for establishing a closed carbon layer to prevent the formation of voids. The latter, however, may lead to non-ideal nucleation conditions for high quality layers with a low density of domain boundaries. Our investigations indicate that a continuous ramp-up as fast as possible with no waiting step would be preferable. The worst layer quality, as measured by peak intensity and FWHM of the (200) reflection of 3C SiC, can be found at a temperature of about 1000°C, which indicates that here the nucleation rate would be the highest. So longer periods within this temperature range should be avoided by applying high ramping speeds during the carbonization step.