Design and Fabrication of 4H-Sic Mosfets with Optimized JFET and p-Body Design
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Published:2020-11
Issue:
Volume:1014
Page:93-101
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ISSN:1662-9752
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Container-title:Materials Science Forum
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language:
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Short-container-title:MSF
Author:
Ni Wei Jiang1ORCID, Wang Xiao Liang1, Feng Chun1, Xiao Hong Ling1, Jiang Li Juan1, li wei1, Wang Quan1, Li Ming Shan2, Schlichting Holger3, Erlbacher Tobias4ORCID
Affiliation:
1. Chinese Academy of Sciences 2. Beijing Century Goldray Semiconductor Co., Ltd 3. Fraunhofer Institute of Integrated Systems and Device Technology (IISB) 4. Fraunhofer Institute for Integrated Systems and Device Technology
Abstract
In this paper, 4H-SiC planar MOSFETs were designed and fabricated. By using TCAD tool, the trade-off between on-resistance and maximum gate oxide electric field was optimized. With optimized gate oxide growth process, the gate oxide’s critical electric field of 9.8 MV/cm and the effective barrier height of 2.57 eV between SiO2 and 4H-SiC were obtained. The field effective mobility with different p-body doping was compared and studied. The MOS interface state density of 1.12E12 cm-2eV-1 at EC - EIT = 0.21 eV and channel mobility of 19.3 cm2/Vs at VGS = 20 V were obtained. The fabricated MOSFET’s on-resistance of 6.4 mΩcm2 was obtained with hexagonal cell structure which is very consistent with the simulation results.
Publisher
Trans Tech Publications, Ltd.
Subject
Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science
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