Evolving Image Sensor Architecture through Stacking Devices-Reference-Cited by-同舟云学术

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Evolving Image Sensor Architecture through Stacking Devices

Published:2021-07-01 Issue:1 Volume:15 Page:5-15
ISSN:1882-0875
Container-title:IEICE ESS Fundamentals Review
language:en
Short-container-title:IEICE Fundamentals Review

Author:

OIKE Yusuke¹

Affiliation:

1. Research Division 1, Sony Semiconductor Solutions Corporation

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

General Earth and Planetary Sciences,General Environmental Science

Link

https://www.jstage.jst.go.jp/article/essfr/15/1/15_5/_pdf

Reference15 articles.

1. (1) S. Iwabuchi, et al., “A back-illuminated high-sensitivity small-pixel color CMOS image sensor with flexible layout of metal wiring,” ISSCC Dig. Tech. Papers, Feb. 2006.

2. (2) S. Sukegawa, et al., “A 1/4-inch 8Mpixel back-illuminated stacked CMOS image sensor,” ISSCC Dig. Tech. Papers, Feb. 2013.

3. (3) Y. Kagawa, et al., “Novel stacked CMOS image sensor with advanced Cu2Cu hybrid bonding,” IEDM Dig. Tech. Papers, Dec. 2016.

4. (4) Y. Kagawa, et al., “The Scaling of Cu-Cu Hybrid Bonding For High Density 3D Chip Stacking,” EDTM Dig. Tech. Papers, March 2019.

5. (5) A. Suzuki, et al., “A 1/1.7-inch 20Mpixel Back-illuminated stacked CMOS image sensor for new imaging applications,” ISSCC Dig. Tech. Papers, Feb. 2015.

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Novel three-layer stacking process with face-to-back CoW 6 μm-pitch hybrid bonding;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

2. Development of 0.5 μm Pixel 3-Wafers Stacked CMOS Image Sensor with through Silicon Deep Contact and In-pixel Cu-Cu Bonding Process;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

3. 3D Stacking Process Technologies for Advanced CMOS Image Sensors;2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA);2024-04-22

4. 3D Stacking Process Technologies for Advanced CMOS Image Sensors;Journal of The Japan Institute of Electronics Packaging;2024-01-01

5. Development of high reliability $6\ \mu\mathrm{m}$-pitch Cu-Cu connections using over-400mm²-large Chip on Wafer bonding process;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05

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