Surface-Potential-Based Drain Current Model for Polycrystalline Silicon Thin-Film Transistors-Reference-Cited by-同舟云学术

Surface-Potential-Based Drain Current Model for Polycrystalline Silicon Thin-Film Transistors

Published:2008-10-17 Issue:10 Volume:47 Page:7798-7802
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:en
Short-container-title:Jpn. J. Appl. Phys.

Author:

Tsuji Hiroshi,Kuzuoka Tsuyoshi,Kishida Yuji,Shimizu Yoshiyuki,Kirihara Masaharu,Kamakura Yoshinari,Morifuji Masato,Shimizu Yoshiteru,Miyano Soichiro,Taniguchi Kenji

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Reference14 articles.

1. A short-channel DC SPICE model for polysilicon thin-film transistors including temperature effects

2. MOSFET modeling for analog circuit CAD: problems and prospects

3. On the pseudo-subthreshold characteristics of polycrystalline-silicon thin-film transistors with large grain size

4. Threshold voltage, field effect mobility, and gate-to-channel capacitance in polysilicon TFTs

5. Modeling and characterization of polycrystalline-silicon thin-film transistors with a channel-length comparable to a grain size

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Characteristics of Fully-Depleted Poly-Si Thin Film Transistors Operated in Above-Threshold Region with Low Drain Bias;IETE Journal of Research;2024-06-10

2. A channel-potential-based surface potential model and a turn-on DC channel-potential-based drain current model for fully-depleted poly-Si thin film transistors including tail and deep acceptor-like trap states in bulk;Modern Physics Letters B;2019-12-06

3. A surface-potential-based drain current model suitable for poly-Si thin film transistors with thin body and thin gate oxide;Journal of Physics: Conference Series;2018-12

4. Compact modeling of dynamic trap density evolution for predicting circuit-performance aging;Microelectronics Reliability;2018-01

5. Explicit solution of channel potential and drain current model in symmetric double-gate polysilicon TFTs;Journal of Semiconductors;2014-03