Abstract
This paper benchmarks various epitaxial growth schemes based on n-type group-IV materials as viable source/drain candidates for Ge nMOS devices. Si:P grown at low temperature on Ge, gives an active carrier concentration as high as 3.5 × 1020 cm−3 and a contact resistivity down to 7.5 × 10−9 Ω.cm2. However, Si:P growth is highly defective due to large lattice mismatch between Si and Ge. Within the material stacks assessed, one option for Ge nMOS source/drain stressors would be to stack Si:P, deposited at contact level, on top of a selectively grown n-Si
y
Ge1−x−y
Sn
x
at source/drain level, in line with the concept of Si passivation of n-Ge surfaces to achieve low contact resistivities as reported in literature (Martens et al. 2011 Appl. Phys. Lett., 98, 013 504). The saturation in active carrier concentration with increasing P (or As)-doping is the major bottleneck in achieving low contact resistivities for as-grown Ge or Si
y
Ge1−x−y
Sn
x
. We focus on understanding various dopant deactivation mechanisms in P-doped Ge and Ge1−x
Sn
x
alloys. First principles simulation results suggest that P deactivation in Ge and Ge1−x
Sn
x
can be explained both by P-clustering and donor-vacancy complexes. Positron annihilation spectroscopy analysis, suggests that dopant deactivation in P-doped Ge and Ge1−x
Sn
x
is primarily due to the formation of P
n
-V and Sn
m
P
n
-V clusters.
Funder
Fonds Wetenschappelijk Onderzoek
Academy of Finland
Publisher
The Electrochemical Society
Subject
Electronic, Optical and Magnetic Materials
Cited by
8 articles.
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