Ge/IIIV fin field-effect transistor common gate process and numerical simulations-Reference-Cited by-同舟云学术

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Ge/IIIV fin field-effect transistor common gate process and numerical simulations

Published:2017-05-23 Issue:2 Volume:16 Page:024501
ISSN:1932-5150
Container-title:Journal of Micro/Nanolithography, MEMS, and MOEMS
language:en
Short-container-title:J. Micro/Nanolith. MEMS MOEMS

Author:

Chen Bo-Yuan¹,Chen Jiann-Lin²,Chu Chun-Lin³,Luo Guang-Li³,Lee Shyong⁴,Chang Edward Yi⁵

Affiliation:

1. National Chiao Tung University, Department of Materials Science and Engineering, Hsinchu, TaiwanbNational Nano Device Laboratories, Hsinchu, Taiwan

2. I-Shou University, Department of Mechanical and Automation Engineering, Kaohsiung City, Taiwan

3. National Nano Device Laboratories, Hsinchu, Taiwan

4. National Central University, Department of Mechanical Engineering, Chung-li, Taiwan

5. National Chiao Tung University, Department of Materials Science and Engineering, Hsinchu, Taiwan

Publisher

SPIE-Intl Soc Optical Eng

Subject

Electrical and Electronic Engineering,Mechanical Engineering,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference18 articles.

1. Ge gate stacks based on Ge oxide interfacial layers and the impact on MOS device properties

2. Material potential and scalability challenges of germanium CMOS;Toriumi,2011

3. Interface Layers for High-k/Ge Gate Stacks: Are They Necessary?

4. HfO2 as gate dielectric on Ge: Interfaces and deposition techniques

5. Opportunities and challenges for Ge CMOS – Control of interfacing field on Ge is a key (Invited Paper)

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