Photoresist line-edge roughness analysis using scaling concepts

Author:

Constantoudis Vassilios

Publisher

SPIE-Intl Soc Optical Eng

Subject

Electrical and Electronic Engineering,Mechanical Engineering,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference13 articles.

1. T. Linton, M. Giles, and P. Packan, “The impact of line edge roughness on 100 nm device performance,”IEEE Silicon Nanoelectron. Workshop, pp 28–29 (1999).

2. Gate line-edge roughness effects in 50-nm bulk MOSFET devices

3. S. Kaya, A. R. Brown, A. Asenov, D. Magot, and T. Linton, “Analysis of statistical fluctuation due to line edge roughness in sub-0.1μm MOSFETS,”Proc. SISPAD, pp. 78–81 (2001).

4. Metrology method for the correlation of line edge roughness for different resists before and after etch

5. M. Ercken, G. Storms, C. Delvaux, N. Vandenbroeck, P. Leunissen, and I. Pollentier, “Line edge roughness and its increasing importance,”Interface(2002).

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