GAN-Based Framework for Unified Estimation of Process-Induced Random Variation in FinFET

Author:

Park Taeeon1ORCID,Kwak Jihwan1,Ahn Hongjoon1,Lee Jinwoong2,Lim Jaehyuk2ORCID,Yu Sangho2,Shin Changhwan3ORCID,Moon Taesup1ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea

2. Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, South Korea

3. School of Electrical Engineering, Korea University, Seoul, South Korea

Funder

Ministry of Trade, Industry and Energy (MOTIE) of Korean Government and the Korea Semiconductor Research Consortium (KSRC) Support Program for the development of the future semiconductor device

Institute for Information and Communication Technology Planning and Evaluation (IITP) grant of Korean Government [Artificial Intelligence Graduate School Program (Seoul National University)]

Artificial Intelligence Innovation Hub

New Faculty Startup Fund from Seoul National University

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Reference74 articles.

1. Adam: A method for stochastic optimization;kingma;arXiv 1412 6980,2014

2. Surface roughness generated by plasma etching processes of silicon

3. The first compact model to determine VT distribution for DG-FinFET due to LER;rawat;IEEE Trans Electron Devices,2018

4. Pytorch: An imperative style, high-performance deep learning library;paszke;Proc Adv Neural Inf Process Syst,2019

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