Sustainability and applicability of spacer-related patterning towards 7nm node-Reference-Cited by-同舟云学术

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Sustainability and applicability of spacer-related patterning towards 7nm node

Published:2015-03-20 Issue: Volume: Page:
ISSN:0277-786X
Container-title:Advances in Patterning Materials and Processes XXXII
language:
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Author:

Oyama Kenichi,Yamauchi Shohei,Hara Arisa,Natori Sakurako,Yamato Masatoshi,Okabe Noriaki,Koike Kyohei,Yaegashi Hidetami

Publisher

SPIE

Reference12 articles.

1. The important challenge to extend spacer DP process towards 22nm and beyond

2. Novel approaches to implement the self-aligned spacer DP process toward 11-nm node and beyond;Yaegashi,2011

3. Overview: continuous evolution on double-patterning process

4. Process variability of self-aligned multiple patterning

5. Sustainable scaling technique on double-patterning process

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3. Calibration Method for Alignment Error Caused by Asymmetric Deformation of Mark and Its Application in Overlay Measurement;Chinese Journal of Lasers;2019

4. Directed self-assembly of block copolymers for 7 nanometre FinFET technology and beyond;Nature Electronics;2018-10

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