A Study of the Via Pattern Lithography Process Window Under the 7 NM Logic Design Rules With 193 NM Immersion Lithography-Reference-Cited by-同舟云学术

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A Study of the Via Pattern Lithography Process Window Under the 7 NM Logic Design Rules With 193 NM Immersion Lithography

Published:2024-03-17 Issue: Volume:4 Page:1-3
ISSN:
Container-title:2024 Conference of Science and Technology for Integrated Circuits (CSTIC)
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Author:

Zhu Jinhao¹,Liu Xianhe¹,Wang Qi¹,Li Ying²,Wu Qiang¹,Li Yanli¹

Affiliation:

1. School of Microelectronics, Fudan University,Shanghai,China,201203

2. National Integrated Circuit Innovation Center Pudong New Area,Shanghai,China,201203

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10531806/10531771/10531838.pdf?arnumber=10531838

Reference5 articles.

1. 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

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