Spacer double patterning technique for sub-40nm DRAM manufacturing process development-Reference-Cited by-同舟云学术

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Spacer double patterning technique for sub-40nm DRAM manufacturing process development

Published:2008-11-20 Issue: Volume: Page:
ISSN:0277-786X
Container-title:SPIE Proceedings
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Author:

Shiu Weicheng,Ma William,Lee Hong Wen,Wu Jan Shiun,Tseng Yi Min,Tsai Kevin,Liao Chun Te,Wang Aaron,Yau Alan,Lin Yi Ren,Chen Yu Lung,Wang Troy,Wu Wen Bin,Shih Chiang Lin

Publisher

SPIE

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Chemical trimming overcoat: an enhancing composition and process for 193nm lithography;SPIE Proceedings;2016-03-25

2. Spectral analysis of the line-width and line-edge roughness transfer during self-aligned double patterning approach;SPIE Proceedings;2015-03-17

3. Anti-spacer double patterning;SPIE Proceedings;2014-03-27

4. Novel and cost-effective multiple patterning technology by means of invisible SiOxNy hardmask;SPIE Proceedings;2014-03-27

5. SADP for BEOL using chemical slimming with resist mandrel for beyond 22nm nodes;SPIE Proceedings;2012-03-29

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