Spectral analysis of the line-width and line-edge roughness transfer during self-aligned double patterning approach
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SPIE
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1. Plasmonic lithography for the fabrication of surface nanostructures with a feature size down to 9 nm;Nanoscale;2020
2. Self-aligned blocking integration demonstration for critical sub-30-nm pitch Mx level patterning with EUV self-aligned double patterning;Journal of Micro/Nanolithography, MEMS, and MOEMS;2018-07-31
3. Self-aligned blocking integration demonstration for critical sub-30nm pitch Mx level patterning with EUV self-aligned double patterning;Advanced Etch Technology for Nanopatterning VII;2018-04-04
4. Spectral analysis of sidewall roughness during resist-core self-aligned double patterning integration;Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena;2016-09
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