1. Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams
2. Collaborative Benchmarking and Experimental Algorithmic Laboratory, http://www.cbl.ncsu.edu:16080/benchmarks/LGSynth93/testcases/
3. H.A. Curtis, The Design of switching Circuits, D. van Nostrand Company Inc., New York 1962
4. R. Ebend and G. Fey, R. Drechsler, Advanced BDD Optimization, Springer, Dordrecht, 2005
5. ALTO: an iterative area/performance tradeoff algorithm for LUT-based FPGA technology mapping