Low subthreshold slope in junctionless multigate transistors-Reference-Cited by-同舟云学术

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Low subthreshold slope in junctionless multigate transistors

Published:2010-03-08 Issue:10 Volume:96 Page:102106
ISSN:0003-6951
Container-title:Applied Physics Letters
language:en
Short-container-title:Appl. Phys. Lett.

Author:

Lee Chi-Woo,Nazarov Alexei N.,Ferain Isabelle,Akhavan Nima Dehdashti,Yan Ran,Razavi Pedram,Yu Ran,Doria Rodrigo T.,Colinge Jean-Pierre

Publisher

AIP Publishing

Subject

Physics and Astronomy (miscellaneous)

Link

http://aip.scitation.org/doi/pdf/10.1063/1.3358131

Reference10 articles.

1. Improved subthreshold characteristics of n-channel SOI transistors

2. Graded-channel fully depleted Silicon-On-Insulator nMOSFET for reducing the parasitic bipolar effects

3. The characteristics of CMOS devices in oxygen-implanted silicon-on-insulator structures

4. Simulation and design of a germanium L-shaped impact-ionization MOS transistor

5. Punch-through impact ionization MOSFET (PIMOS): From device principle to applications

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