Stacking fault generation during relaxation of silicon germanium on insulator layers obtained by the Ge condensation technique
Author:
Publisher
AIP Publishing
Subject
Physics and Astronomy (miscellaneous)
Link
http://aip.scitation.org/doi/pdf/10.1063/1.2470722
Reference20 articles.
1. S. M. Sze, Physics of Semiconductor Devices, 2nd ed. (Wiley, New York, 1981), p. 849.
2. Frontiers of silicon-on-insulator
3. Fabrication of strained Si on an ultrathin SiGe-on-insulator virtual substrate with a high-Ge fraction
4. A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100 nm Strained Silicon-on-Insulator MOSFETs
5. Temperature effects on Ge condensation by thermal oxidation of SiGe-on-insulator structures
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