Characteristics of stress-induced defects under positive bias in high-k/InGaAs stacks
Author:
Affiliation:
1. Department of Materials Science and Engineering, Technion-Israel Institute of Technology, 32000 Haifa, Israel
Publisher
AIP Publishing
Subject
Physics and Astronomy (miscellaneous)
Reference20 articles.
1. Nanometre-scale electronics with III–V compound semiconductors
2. E. H. Nicollian and J. R. Brews , MOS (Metal Oxide Semiconductor) Physics and Technology ( Wiley, New York, 2003).
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4. Experimental evidence for the correlation between the weak inversion hump and near midgap states in dielectric/InGaAs interfaces
5. Degradation characteristics of metal/Al2O3/n-InGaAs capacitors
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1. Influence of the spatial distribution of border traps in the capacitance frequency dispersion of Al2O3/InGaAs;Solid-State Electronics;2018-11
2. On the Apparent Non-Arrhenius Temperature Dependence of Charge Trapping in IIIV/High- ${k}$ MOS Stack;IEEE Transactions on Electron Devices;2018-09
3. Temperature dependence of trapping effects in metal gates/Al 2 O 3 /InGaAs stacks;Solid-State Electronics;2017-06
4. Investigation of stress induced interface states in Al2O3/InGaAs metal-oxide-semiconductor capacitors;Journal of Applied Physics;2017-05-07
5. Comparison of the degradation characteristics of AlON/InGaAs and Al2O3/InGaAs stacks;Journal of Applied Physics;2015-03-14
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