Interfacial and electrical properties of InGaAs metal-oxide-semiconductor capacitor with TiON/TaON multilayer composite gate dielectric-Reference-Cited by-同舟云学术

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Interfacial and electrical properties of InGaAs metal-oxide-semiconductor capacitor with TiON/TaON multilayer composite gate dielectric

Published:2015-03-23 Issue:12 Volume:106 Page:123504
ISSN:0003-6951
Container-title:Applied Physics Letters
language:en
Short-container-title:Appl. Phys. Lett.

Author:

Wang L. S.¹²,Xu J. P.¹,Liu L.¹,Lu H. H.¹,Lai P. T.³,Tang W. M.⁴

Affiliation:

1. School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China

2. Department of Physics Science and Technology, Wuhan University of Technology, Wuhan 430070, China

3. Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Pokfulam, Hong Kong

4. Department of Applied Physics, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong

Funder

the University Development Fund of the Hong Kong Polytechnic University

the University Development Fund of the University of Hong Kong

National Natural Science Foundation of China (NSFC)

Publisher

AIP Publishing

Subject

Physics and Astronomy (miscellaneous)

Link

http://aip.scitation.org/doi/pdf/10.1063/1.4916539

Reference20 articles.

1. Nanometre-scale electronics with III–V compound semiconductors

2. Metal gate HfO[sub 2] metal-oxide-semiconductor structures on InGaAs substrate with varying Si interface passivation layer and postdeposition anneal condition

3. Atomic layer deposited (TiO2)x(Al2O3)1−x/In0.53Ga0.47As gate stacks for III-V based metal-oxide-semiconductor field-effect transistor applications

4. Capacitance–Voltage Characterization of La2O3Metal–Oxide–Semiconductor Structures on In0.53Ga0.47As Substrate with Different Surface Treatment Methods

5. Ge-based interface passivation for atomic layer deposited La-doped ZrO2 on III-V compound (GaAs,In0.15Ga0.85As) substrates

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1. Comparative Study of Logic Performance of Hybrid CMOSFETs at Deca-Nanometer Regime;Lecture Notes in Electrical Engineering;2020-09-20

2. Improved dielectric properties of La2O3–ZrO2 bilayer films for novel gate dielectrics;Vacuum;2020-08

3. Impact of sidewall spacer on n-InGaAs devices and hybrid InGaAs/Si CMOS amplifiers in deca-nanometer regime;Microsystem Technologies;2017-12-07

4. Impact of aspect ratio of nanoscale hybrid p-Ge/n-Si complementary FinFETs on the logic performance;Microsystem Technologies;2017-11-20

5. Low Interface Trap Densities and Enhanced Performance of AlGaN/GaN MOS High- Electron Mobility Transistors Using Thermal Oxidized Y₂O₃ Interlayer;IEEE Electron Device Letters;2015-12

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