Multi-bit NAND Flash memories for ultra high density storage devices-Reference-Cited by-同舟云学术

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Multi-bit NAND Flash memories for ultra high density storage devices

Published:2014 Issue: Volume: Page:75-119
ISSN:
Container-title:Advances in Non-volatile Memory and Storage Technology
language:
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Author:

Micheloni R.,Crippa L.

Publisher

Elsevier

Reference73 articles.

1. A 3.3V 1Gb multi-level NAND Flash memory with non-uniform threshold voltage distribution solid-state circuits conference;Cho;Digest of Technical Papers, ISSCC, IEEE International,2001

2. A 16Gb 3 b/cell NAND Flash memory in 56nm with 8MB/s write rate solid-state circuits conference;Li;Digest of Technical Papers, ISSCC, IEEE International,2008

3. A 5.6MB/s 64Gb 4 b/Cell NAND Flash memory in 43nm CMOS solid-state circuits conference;Trinh;Digest of Technical Papers, ISSCC, IEEE International,2009

4. Inside NAND Flash Memories;Micheloni,2010

5. A 35ns Cycle Time 3.3V-only 32Mb NAND Flash EEPROM;Iwata;IEEE Journal of Solid-State Circuits,1995

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1. Unlocking large memory windows and 16-level data per cell memory operations in hafnia-based ferroelectric transistors;Science Advances;2024-06-07

2. Review of neuromorphic computing based on NAND flash memory;Nanoscale Horizons;2024

3. Introduction to 3D NAND Flash Memories;Machine Learning and Non-volatile Memories;2022

4. Random Telegraph Noise in Flash Memories;Noise in Nanoscale Semiconductor Devices;2020

5. 3D NAND Flash Memories;Inside Solid State Drives (SSDs);2018

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