Charge Trapping in Amorphous Dielectrics for Secure Charge Storage
Author:
Affiliation:
1. School of Electronic and Electrical Engineering, Hankyong National University, 327 Jungang-ro, Anseong-si, Gyeonggi-do 17579, Korea
2. Department of Energy Science, Sungkyunkwan University, 2066 Seobu-ro, Suwon-si, Gyeonggi-do 16419, Korea
Funder
National Research Foundation
Publisher
American Chemical Society (ACS)
Subject
General Materials Science
Link
https://pubs.acs.org/doi/pdf/10.1021/acsami.0c23083
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4. Huo, Z.; Yang, J.; Lim, S.; Baik, S.; Lee, J.; Han, J.; Yeo, I. S.; Chung, U. I.; Moon, J. T.; Ryu, B. I. Band Engineered Charge Trap Layer for Highly Reliable MLC Flash Memory. 2007 IEEE Symposium on VLSI Technology; IEEE, 2007 Jun 12; pp 138–139.
5. Performance enhancement of multilevel cell nonvolatile memory by using a bandgap engineered high-κ trapping layer
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