Sub-10 nm Monolayer MoS2 Transistors Using Single-Walled Carbon Nanotubes as an Evaporating Mask-Reference-Cited by-同舟云学术

Sub-10 nm Monolayer MoS2 Transistors Using Single-Walled Carbon Nanotubes as an Evaporating Mask

Published:2019-03-06 Issue:12 Volume:11 Page:11612-11617
ISSN:1944-8244
Container-title:ACS Applied Materials & Interfaces
language:en
Short-container-title:ACS Appl. Mater. Interfaces

Author:

Xiao Xiaoyang¹²,Chen Mo¹²,Zhang Jin¹²,Zhang Tianfu¹²,Zhang Lihui¹²,Jin Yuanhao¹²,Wang Jiaping¹²^ORCID,Jiang Kaili¹²,Fan Shoushan¹²,Li Qunqing¹²^ORCID

Affiliation:

1. Department of Physics, State Key Laboratory of Low-Dimensional Quantum Physics, and Tsinghua-Foxconn Nanotechnology Research Center, Tsinghua University, Beijing 100084, P. R. China

2. Collaborative Innovation Center of Quantum Matter, Beijing 100084, P. R. China

Funder

National Natural Science Foundation of China

Ministry of Science and Technology of the People's Republic of China

Publisher

American Chemical Society (ACS)

Subject

General Materials Science

Link

https://pubs.acs.org/doi/pdf/10.1021/acsami.8b21437

Reference30 articles.

1. CMOS design near the limit of scaling

2. Moore's Law Forever?

3. Silicon Device Scaling to the Sub-10-nm Regime

4. MoS 2 transistors with 1-nanometer gate lengths

5. Channel Length Scaling of MoS2MOSFETs

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