Impurity Effects in Electroplated-Copper Solder Joints
Author:
Publisher
MDPI AG
Subject
General Materials Science,Metals and Alloys
Link
http://www.mdpi.com/2075-4701/8/6/388/pdf
Reference58 articles.
1. Damascene copper electroplating for chip interconnections
2. Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration
3. Investigations regarding Through Silicon Via filling for 3D integration by Periodic Pulse Reverse plating with and without additives
4. Extreme Bottom-Up Superfilling of Through-Silicon-Vias by Damascene Processing: Suppressor Disruption, Positive Feedback and Turing Patterns
5. High-Aspect-Ratio Copper Via Filling Used for Three-Dimensional Chip Stacking
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