Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration-Reference-Cited by-同舟云学术

Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration

Published:2011-05 Issue:5 Volume:88 Page:745-748
ISSN:0167-9317
Container-title:Microelectronic Engineering
language:en
Short-container-title:Microelectronic Engineering

Author:

Olmen J. Van,Huyghebaert C.,Coenen J.,Aelst J. Van,Sleeckx E.,Ammel A. Van,Armini S.,Katti G.,Vaes J.,Dehaene W.,Beyne E.,Travaly Y.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference9 articles.

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