A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells

Author:

Pechmann StefanORCID,Mai Timo,Völkel MatthiasORCID,Mahadevaiah Mamathamba K.,Perez EduardoORCID,Perez-Bosch Quesada EmilioORCID,Reichenbach MarcORCID,Wenger ChristianORCID,Hagelauer AmelieORCID

Abstract

In this work, we present an integrated read and programming circuit for Resistive Random Access Memory (RRAM) cells. Since there are a lot of different RRAM technologies in research and the process variations of this new memory technology often spread over a wide range of electrical properties, the proposed circuit focuses on versatility in order to be adaptable to different cell properties. The circuit is suitable for both read and programming operations based on voltage pulses of flexible length and height. The implemented read method is based on evaluating the voltage drop over a measurement resistor and can distinguish up to eight different states, which are coded in binary, thereby realizing a digitization of the analog memory value. The circuit was fabricated in the 130 nm CMOS process line of IHP. The simulations were done using a physics-based, multi-level RRAM model. The measurement results prove the functionality of the read circuit and the programming system and demonstrate that the read system can distinguish up to eight different states with an overall resistance ratio of 7.9.

Funder

Deutsche Forschungsgemeinschaft

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Inner Product Computation In-Memory Using Distributed Arithmetic;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-11

2. A Mixed-Signal Interface Circuit for Integration of Embedded 1T1R RRAM Arrays;2022 IEEE 35th International System-on-Chip Conference (SOCC);2022-09-05

3. Majority Logic Based In-Memory Comparator;2022 IEEE International Conference on Semiconductor Electronics (ICSE);2022-08-15

4. A Read Circuit Design for Multi-Level RRAM Cells Exhibiting Small Resistance Windows;2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS);2022-08-07

5. Memristive-based in-memory computing: from device to large-scale CMOS integration;Neuromorphic Computing and Engineering;2021-11-18

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