A Mixed-Signal Interface Circuit for Integration of Embedded 1T1R RRAM Arrays-Reference-Cited by-同舟云学术

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A Mixed-Signal Interface Circuit for Integration of Embedded 1T1R RRAM Arrays

Published:2022-09-05 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 35th International System-on-Chip Conference (SOCC)
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Author:

Pechmann Stefan¹,Hagelauer Amelie²

Affiliation:

1. Technical University of Munich,Chair of Micro- and Nanosystems Technology,Munich,Germany

2. Technical University of Munich and Fraunhofer EMFT Research Institution for Microsystems and Solid State Technologies,Chair of Micro- and Nanosystems Technology,Munich,Germany

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9907764/9908069/09908137.pdf?arnumber=9908137

Reference16 articles.

1. Optimization of multi-level operation in rram arrays for in-memory computing;pérez;Electronics,0

2. Analysis of the statistics of device-to-device and cycle-to-cycle variability in TiN/Ti/Al:HfO2/TiN RRAMs

3. Impact of the Incremental Programming Algorithm on the Filament Conduction in HfO2-Based RRAM Arrays

4. Variability and Energy Consumption Tradeoffs in Multilevel Programming of RRAM Arrays

5. LMC555 CMOS Timer;Texas Instruments,2016

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Structured Approach for Embedded Memory Integration of Emerging Memory Technologies;2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS);2024-02-27

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