64‐2: The Effect of Poly Silicon Grain Boundary Reduction on LTPS Devices and Display Effects Applied to Flexible AMOLED

Abstract

Low‐temperature polycrystalline silicon (LTPS) thin‐film transistor devices can be used as core components of pixel driving circuits for active matrix organic light‐emitting displays （AMOLED）. Poly silicon (P‐Si) film and device performance directly affects the display effect. This paper investigates polysilicon grain boundary reduction for LTPS devices on PI substrates, exploring the effects of grain boundary reduction on LTPS devices and image sticking. Reduction of polysilicon grain boundaries through optimization of a‐Si deposition process, a‐Si two‐step deposition and excimer laser annealing (ELA) doublescan process, ELA double‐scan process reduces grain boundaries by 67 %. We prepared LTPS devices with thinner gate interlayers (GI) based on P‐Si grain boundary reduction, LTPS devices with positive threshold voltage bias and increased mobility, AMOLED displays with thinner GI can have 23% better image sticking.