Demystifying memory access patterns of FPGA-based graph processing accelerators-Reference-Cited by-同舟云学术

Demystifying memory access patterns of FPGA-based graph processing accelerators

Published:2021-06-20 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 4th ACM SIGMOD Joint International Workshop on Graph Data Management Experiences & Systems (GRADES) and Network Data Analytics (NDA)
language:
Short-container-title:

Author:

Dann Jonas¹,Ritter Daniel¹,Fröning Holger²

Affiliation:

1. SAP SE, Walldorf, (Germany)

2. Heidelberg University, Heidelberg, (Germany)

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3461837.3464512

Reference29 articles.

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2. Osama G. Attia Tyler Johnson Kevin Townsend Phillip H. Jones and Joseph Zambreno. 2014. CyGraph: A Reconfigurable Architecture for Parallel Breadth-First Search. In IPDPS. 228--235. Osama G. Attia Tyler Johnson Kevin Townsend Phillip H. Jones and Joseph Zambreno. 2014. CyGraph: A Reconfigurable Architecture for Parallel Breadth-First Search. In IPDPS. 228--235.

3. A Template-Based Design Methodology for Graph-Parallel Hardware Accelerators

4. Maciej Besta Emanuel Peter Robert Gerstenberger Marc Fischer Michal Podstawski Claude Barthels etal 2019. Demystifying Graph Databases: Analysis and Taxonomy of Data Organization System Designs and Graph Queries. CoRR abs/1910.09017 (2019). Maciej Besta Emanuel Peter Robert Gerstenberger Marc Fischer Michal Podstawski Claude Barthels et al. 2019. Demystifying Graph Databases: Analysis and Taxonomy of Data Organization System Designs and Graph Queries. CoRR abs/1910.09017 (2019).

5. Brahim Betkaoui Yu Wang David B. Thomas and Wayne Luk. 2012. A Reconfigurable Computing Approach for Efficient and Scalable Parallel Graph Exploration. In ASAP. 8--15. Brahim Betkaoui Yu Wang David B. Thomas and Wayne Luk. 2012. A Reconfigurable Computing Approach for Efficient and Scalable Parallel Graph Exploration. In ASAP. 8--15.

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