Author:
Savoj Jafar,Razavi Behzad
Cited by
5 articles.
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1. Design and Realization of CDR and SerDes Circuit Used in BLVDS Controlling System;Recent Advances in Computer Science and Information Engineering;2012
2. Half-Rate Duobinary Transmitter Architecture for Chip-to-Chip Interconnect Applications;Analog Integrated Circuits and Signal Processing;2011-04-03
3. An integrated 0.35μm CMOS optical receiver with clock and data recovery circuit;Microelectronics Journal;2006-09
4. An interface board for the control and data acquisition of the Medipix2 chip;Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment;2003-08
5. Digital PLL Design;Clock Generators for SOC Processors