Using run-time reverse-engineering to optimize DRAM refresh

Author:

Mathew Deepak M.1,Zulian Éder F.1,Jung Matthias2,Kraft Kira1,Weis Christian1,Jacob Bruce3,Wehn Norbert1

Affiliation:

1. University of Kaiserslautern, Kaiserslautern, Germany

2. Fraunhofer IESE, Kaiserslautern, Germany

3. University of Maryland

Funder

Fraunhofer High Performance Center for Simulation- and Software-based Innovation

Carl-Zeiss-Stiftung

Deutsche Forschungsgemeinschaft

Horizon 2020

Publisher

ACM

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. XFM: Accelerated Software-Defined Far Memory;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

2. CDAR-DRAM: Enabling Runtime DRAM Performance and Energy Optimization via In-Situ Charge Detection and Adaptive Data Restoration;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09

3. FeFET versus DRAM based PIM Architectures: A Comparative Study;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03

4. The Dynamic Random Access Memory Challenge in Embedded Computing Systems;A Journey of Embedded and Cyber-Physical Systems;2020-07-31

5. A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing;Lecture Notes in Computer Science;2019

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