A Fully Synchronous Digital LDO with Built-in Adaptive Frequency Modulation and Implicit Dead-Zone Control-Reference-Cited by-同舟云学术

A Fully Synchronous Digital LDO with Built-in Adaptive Frequency Modulation and Implicit Dead-Zone Control

Published:2023-01-16 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 28th Asia and South Pacific Design Automation Conference
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Author:

Yamaguchi Shun¹,Islam Mahfuzul¹,Hisakado Takashi¹,Wada Osami¹

Affiliation:

1. Kyoto University, Kyoto, Japan

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3566097.3567945

Reference6 articles.

1. 2016. A fully integrated digital LDO with coarse-fine-tuning and burst-mode operation;Mo Huang;IEEE Trans. on Circuits Syst. II Express Briefs,2016

2. 2017. A fully integrated digital low-dropout regulator based on event-driven explicit time-coding architecture;Doyun Kim;IEEE J. Solid-State Circuits,2017

3. Somnath Kundu et al. 2018. A fully integrated 40pF output capacitor beat-frequency-quantizer-based digital LDO with built-in adaptive sampling and active voltage positioning. In ISSCC. 308--310. Somnath Kundu et al. 2018. A fully integrated 40pF output capacitor beat-frequency-quantizer-based digital LDO with built-in adaptive sampling and active voltage positioning. In ISSCC. 308--310.

4. Shuo Li et al. 2019. A 745pA hybrid asynchronous binary-searching and synchronous linear-searching digital LDO with 3.8 × 105 dynamic load range 99.99% current efficiency and 2mV output voltage ripple. In ISSCC. 232--234. Shuo Li et al. 2019. A 745pA hybrid asynchronous binary-searching and synchronous linear-searching digital LDO with 3.8 × 10 5 dynamic load range 99.99% current efficiency and 2mV output voltage ripple. In ISSCC. 232--234.

5. Zhaoqing Wang et al. 2022. Review survey and benchmark of recent digital LDO voltage regulators. In CICC. 01--08. Zhaoqing Wang et al. 2022. Review survey and benchmark of recent digital LDO voltage regulators. In CICC. 01--08.

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1. A Fully Integrated Digital LDO With Adaptive Sampling and Statistical Comparator Selection;IEEE Solid-State Circuits Letters;2024

2. An Adaptive-Sampling Digital LDO with Statistical Comparator Selection Achieving 99.99% Maximum Current Efficiency and 0.25ps FoM in 65nm;2023 IEEE Asian Solid-State Circuits Conference (A-SSCC);2023-11-05