Review, Survey, and Benchmark of Recent Digital LDO Voltage Regulators
Author:
Affiliation:
1. Columbia University
2. Qualcomm
Funder
SRC
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9772767/9772730/09772734.pdf?arnumber=9772734
Reference54 articles.
1. A synthesizable time-based LDO using digital standard cells and analog pass transistor
2. A 0.6 V Resistance-Locked Loop Embedded Digital Low Dropout Regulator in 40 nm CMOS With 80.5% Power Supply Rejection Improvement
3. A Dual-Rail Hybrid Analog/Digital Low-Dropout Regulator With Dynamic Current Steering for a Tunable High PSRR and High Efficiency
4. An Analog-Proportional Digital-Integral Multi-Loop Digital LDO with Fast Response, Improved PSR and Zero Minimum Load Current
5. 14.7 A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation
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