Author:
Singh Deshanand P.,Manohararajah Valavan,Brown Stephen D.
Cited by
5 articles.
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1. VirtualSync+: Timing Optimization With Virtual Synchronization;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-12
2. Virtualsync;Proceedings of the 55th Annual Design Automation Conference;2018-06-24
3. An Interactive Physical Synthesis Methodology for High-Frequency FPGA Designs;Proceedings of the 2016 on International Symposium on Physical Design;2016-04-03
4. Bounded Transactional Timing Analysis;Lecture Notes in Electrical Engineering;2012-08-08
5. Perturb+mutate;ACM Transactions on Reconfigurable Technology and Systems;2008-09