Local search algorithms for timing-driven placement under arbitrary delay models
Author:
Affiliation:
1. Research Institute for Discrete Mathematics, Bonn, Germany
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2744769.2744867
Reference24 articles.
1. Post-layout timing-driven cell placement using an accurate net length model with movable Steiner points
2. U. Brenner. "VLSI Legalization with Minimum Perturbation by Iterative Augmentation." Automation and Test in Europe 1385--1390 2012. U. Brenner. "VLSI Legalization with Minimum Perturbation by Iterative Augmentation." Automation and Test in Europe 1385--1390 2012.
3. BonnPlace
4. How accurately can we model timing in a placement engine?
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1. AMF-Placer 2.0: Open-Source Timing-Driven Analytical Mixed-Size Placer for Large-Scale Heterogeneous FPGA;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-09
2. Fast Predictive Useful Skew Methodology for Timing-Driven Placement Optimization;Proceedings of the 54th Annual Design Automation Conference 2017;2017-06-18
3. Rsyn;Proceedings of the 2017 ACM on International Symposium on Physical Design;2017-03-19
4. OpenDesign flow database: the infrastructure for VLSI design and design automation research;Proceedings of the 35th International Conference on Computer-Aided Design;2016-11-07
5. Clock-Tree-Aware Incremental Timing-Driven Placement;ACM Transactions on Design Automation of Electronic Systems;2016-07-26
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