Author:
Chowdhary Amit,Rajagopal Karthik,Venkatesan Satish,Cao Tung,Tiourin Vladimir,Parasuram Yegna,Halpin Bill
Cited by
10 articles.
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1. DREAMPlace 4.0: Timing-Driven Placement With Momentum-Based Net Weighting and Lagrangian-Based Refinement;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-10
2. Virtual-Path-Based Timing Optimization for VLSI Global Placement;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25
3. DREAMPlace 4.0: Timing-driven Global Placement with Momentum-based Net Weighting;2022 Design, Automation & Test in Europe Conference & Exhibition (DATE);2022-03-14
4. Timing Closure;VLSI Physical Design: From Graph Partitioning to Timing Closure;2022
5. Variation-Aware Global Placement for Improving Timing-Yield of Carbon-Nanotube Field Effect Transistor Circuit;ACM Transactions on Design Automation of Electronic Systems;2018-07-20