Author:
Benbakhti B.,Ayubi-Moak J.S.,Kalna K.,Lin D.,Hellings G.,Brammertz G.,De Meyer K.,Thayne I.,Asenov A.
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference16 articles.
1. Benchmarking nanotechnology for high-performance and low-power logic transistor applications;Chau;IEEE Trans Nanotechnol,2005
2. Benchmarking of scaled InGaAs implant-free NanoMOSFETs;Kalna;IEEE Trans Electron Dev,2008
3. Development methodology for high gate dielectrics on III–V semiconductors: GdxGa0.4-xO0.6/Ga2O3 dielectric stacks on GaAs;Passlack;J Vac Sci Technol B Microelectron Nanometer Struct,2005
4. Methodology for development of high-κ stacked gate dielectrics on III–V semiconductors;Passlack,2005
5. Passlack M, Hartin O, Ray M, Medendorp N. US patent 6 963 090, November 8, 2005.
Cited by
24 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献