Reliability of Buried InGaAs Channel n-MOSFETs With an InP Barrier Layer and Al2O3 Dielectric Under Positive Bias Temperature Instability Stress-Reference-Cited by-同舟云学术

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Reliability of Buried InGaAs Channel n-MOSFETs With an InP Barrier Layer and Al2O3 Dielectric Under Positive Bias Temperature Instability Stress

Published:2020-03-06 Issue: Volume:8 Page:
ISSN:2296-424X
Container-title:Frontiers in Physics
language:
Short-container-title:Front. Phys.

Author:

Li Haiou,Qu Kangchun,Gao Xi,Li Yue,Chen Yonghe,Zhou Zhiping,Ma Lei,Zhang Fabi,Zhang Xiaowen,Fu Tao,Liu Xingpeng,Liu Yingbo,Sun Tangyou,Liu Honggang

Funder

National Natural Science Foundation of China

Natural Science Foundation of Guangxi Province

Publisher

Frontiers Media SA

Subject

Physical and Theoretical Chemistry,General Physics and Astronomy,Mathematical Physics,Materials Science (miscellaneous),Biophysics

Reference33 articles.

1. Nanometre-scale electronics with III-V compound semiconductors;Alamo;Nature,2011

2. Electron effective masses in an InGaAs quantum well with InAs and GaAs inserts;Kulbachinskii;Semicon Sci Technol.,2012

3. Modelling nanoscale n-MOSFETs with III-V compound semiconductor channels: from advanced models for band structures, electrostatics and transport to TCAD;Selmi;IEEE International Electron Devices Meeting (IEDM),2017

4. Fully depleted Ge CMOS devices and logic circuits on Si;Wu;IEEE Electron Device Lett,2016

5. Investigation on high-performance CMOS with p-Ge and n-InGaAs MOSFETs for logic applications;Tewari;IEEE Trans Nano,2015

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