The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology

Author:

Halak Basel,Tenentes Vasileios,Rossi Daniele

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference25 articles.

1. S. Bhardwaj, W. Wang, R. Vattikonda, Y. Cao, S. Vrudhula, “Predictive modeling of the NBTI effect for reliable design,” in Custom Integrated Circuits Conference, 2006. CICC '06. IEEE, 2006, pp. 189–192.

2. “Modeling and Minimization of PMOS NBTI Effect for Robust Nanometer Design,” in Design Automation Conference, 2006 43rd ACM/IEEE;Vattikonda,2006

3. “Impact of Bias Temperature Instability on Soft Error Susceptibility,” IEEE Trans. on Very Large Scale Integration (VLSI) Systems;Rossi,2015

4. “Impacts of contact resistance and NBTI/PBTI on SRAM with high? Metal-gate devices,” in memory technology, design, and testing, 2009. MTDT '09;Yang;IEEE Int. Work.,2009

5. Impact of NBTI on the temporal performance degradation of digital circuits;Paul;IEEE Electron Device Lett.,2005

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1. Evaluating the Impact of Aging on Path-Delay Self-Test Libraries;2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2023-10-03

2. Investigation of the Off-State Degradation in Advanced FinFET Technology—Part II: Compact Aging Model and Impact on Circuits;IEEE Transactions on Electron Devices;2023-03

3. A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-04

4. On the Prediction of the Threshold Voltage Degradation in CMOS Technology Due to Bias-Temperature Instability;Electronics;2018-12-11

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